a) Field of the Invention
The present invention relates to a multilayered wiring of an integrated circuit such as an LSI, and more particularly to an integrated circuit having a multilayered wiring made of Al or Al alloy.
b) Description of the Related Art
In a conventional multilayered wiring structure of an LSI, high temperature resistive conductive materials such as polysilicon and refractory metal silicide are used as the lower layer wiring, and high conductivity metals such as Al and Al alloy are used as the upper layer wiring. In order to further reduce the wiring resistance, it is preferable to use also Al or Al alloy as the lower layer wiring. In forming a multilayered wiring of Al or Al alloy only, a lower wiring layer of Al or Al alloy is first formed and then an interlayer insulating film such as SiO.sub.2 is formed thereon. After forming a contact hole in the insulating film, an upper wiring layer of Al or Al alloy is formed on the insulating film to contact the upper wiring layer to the lower wiring layer via the contact hole.
Electro-migration (EM) at the contact area of such an Al multilayered wiring structure poses a significant issue. It has been believed that EM resistance can be improved by providing a better step coverage of the upper wiring layer at a contact hole.
However, even if the step coverage of the upper wiring layer is improved, the EM resistance will not necessarily be improved. The reason for this is conceivably that the generation of voids or peeling-off of the interface between the upper and lower wiring layers causes a wiring disconnection (for example, refer to Technical Report Vol. 91, No. 332, SDM 91-137 (1991), pp.43 to 44, The Institute of Electronics, Information and Communication Engineers).